Faggin: Overlap Is Not Threshold

Two technical questions

The museum history places Faggin and Klein's silicon-gate work among earlier self-alignment contributions. Their later joint patent describes controlling turn-on voltage through a doped semiconductor gate, and explains how alignment reduces edge capacitance. Those are connected mechanisms, not identical quantities.

The patent summary varies the gate impurity concentration to alter turn-on behaviour. Its process description separately centres the gate between source and drain edges. A record can therefore support both an electrostatic argument and a geometric one without making them interchangeable.

Sources for this section: [2] · [1]

An original geometry exercise

Assume a fictional device has two equal rectangular overlaps. Define C = 2 c W l, with areal coefficient c = 2 fF per square micrometre, width W = 10 micrometres and overlap length l = 0.8 micrometres. Change only l to 0.2 micrometres. Compute the overlap contribution before and after.

Sources for this section: [1]

Reference answer

Initially C = 2 times 2 times 10 times 0.8 = 32 fF. Afterwards C = 8 fF, a 75% reduction in this contribution. If an unchanged additional capacitance is 24 fF, the totals are 56 and 32 fF: the total falls by 24/56, about 42.9%, rather than 75%.

Sources for this section: [1]

The limit of the inference

This calculation stipulates geometry and an areal coefficient; it does not calculate doping, threshold, resistance, load or frequency response. A capacitance reduction cannot be promoted into an equally large speed increase without a circuit model. No historical dimensions or production yields are reconstructed.

Even in a simplified resistance-capacitance timing model, the relevant time scale would involve a resistance multiplied by the total capacitance. A percentage change in only one capacitance term does not supply that total, and a threshold voltage is not a capacitance at all.

Sources for this section: [1]