PDP-8: Processor, Memory and Input/Output

Three parts, several possible roles

The handbook describes a processor, core memory and input/output equipment. It presents the PDP-8 as an independent small computer, a facility within a larger system or a control element. Its introduction specifies 12-bit words and 4,096 words of core memory.

These roles make the same product useful in different arrangements. A laboratory instrument may need computation close to a measurement; a larger installation may need a smaller machine to handle a particular task. The label “minicomputer” alone does not identify those connections or tell us which peripheral equipment was installed.

Sources for this section: [1]

A memory cycle is not every operation

The selected introduction gives a 1.5-microsecond memory cycle and 3.0 microseconds for an addition with one operand already in the accumulator. It separately describes multiplication by subroutine and an optional extended arithmetic element.

The specified starting condition matters. An addition rate calculated from that timing is not a prediction for a complete program that also fetches input, branches, stores results and waits for equipment. An optional arithmetic device is another configuration; it should not be silently inserted into the basic system when telling a buyer what the quoted machine could do.

Sources for this section: [1]

A useful units check

The supplied capacity is 4,096 × 12 = 49,152 bits. Dividing by eight gives 6,144 eight-bit groups as a mathematical conversion. That does not turn the historical word-addressed machine into a modern byte-addressed computer or show how much storage a particular program could use.

For the supplied addition timing, 1,000,000/3 gives roughly 333,333 additions per second under that condition. The two calculations answer capacity and timing questions respectively. Neither answers the time needed to receive a slow external measurement. Keep the unit, operation and starting assumption attached to every number.

Where would a real bottleneck sit?

Classroom case: a hypothetical instrument provides one new reading each second, and the program cannot begin its next independent reading until it arrives. Assume the computation for each reading is completed within that second. Would a faster processor alone double the rate of complete readings?

Reference answer: no. Under the supplied assumptions, input arrival limits the rate. A faster processor may leave more unused time, but the instrument still supplies one reading each second. This is an invented diagnostic case, not a measured PDP-8 installation. Its purpose is to make the connection between computer specification and the surrounding process explicit.